Dream 6800

Posted by musovern on Apr 4th, 2018 in Dream 6800, Single Board Computers | 0 comments

The DREAM 6800 (Domestic Recreational Educational and Adaptive Microcomputer incorporating the Motorola 6800 microprocessor) was designed by Michael J Bauer from Brisbane’s Deakin University. It is not particularly sophisticated but at the time offered those handy with a soldering iron the opportunity to build a simple computer that would be a lot of fun to use. It offered programming in two languages: native 6800 machine code and a strange but quite powerful language called CHIP-8 (Comprehensive Hexadecimal Intetpretive Programming- 8 bit).

In its basic form, the language features thirty-three two-byte instructions and had been developed at the RCA Laboratories in the US by one Joe Weisbecker in the 70s, principally for those interested in writing their own games programs. RCA also developed a computer called the COSMAC VIP, that could run programs written in CHIP-8. At the time it was termed a “high level” language but it would hardly even begin to qualify for that description nowadays. Still, writing CHIP-8 programs was,and still is, fun and of particular interest to MicroBee users is the fact that a CHIP-8 interpreter, cleverly linked to MicroWorld BASIC, was written by a Melbourne solicitor, Lindsay Ford and enhanced CHIP-8 still further by providing additional instructions.

It is to be hoped that it will eventually be able to be run on MicroBee emulators such as PicoMozzy but it does require direct disc access to function, as much of it is menu driven. The CHIP-8 interpreter and monitor program in the DREAM 6800 is housed in ROM and is termed CHIPOS.

It begins at C000H and ends at C3FFH so in all it occupies 1K of memory. Imagine any version of Windows being capable of that? (An unfair comparison you might well say – and you would be conect, of course).
Saving and loading programs is taped-based, and utilises the “Kansas City Standard” with frequency shift keying (FSK) frequencies of 1200Hz and 2400Hz at a rate of 300 bits/second. Screen resolution is 64 pixels wide by 32 pixels high (no, I’m not kidding!) and direct memory access (DMA) for the screen begins at 0100H and extends for 256 bytes (i.e. to 01FFH). There is no colour. Programs are run in memory beginning at 0200H and, for very long ones, it is possible to use an additional area from 0080H to 00FFH.

This computer first saw the light of day as a series of articles that featured in the May, June, July and August 1979 issues of the now-defunct magazine Electronics
Australia and it reappeared in a follow-up booklet entitled Microprocessors and Personal Computers, published in 1980

 

HARDWARE SPECIFICATION

Processor: Motorola M6800.
Clock: M6875 with 4.00MHz crystal.
RAM (On-card): 1K x 8 (2 x 2114) Off-card expansion to 32K.
ROM (CHIPOS) 1K x 8 (2708).
Display: 64 x 32 dot matrix; each dot is 4 TV lines square.
Uses 256 bytes of RAM at loc. 0100 for refresh by DMA.

Video output: 1Vp-p @ 75 ohm.
Input/Output: One M6821 PIA controls:
Hex keypad (16 keys in 4 x 4 matrix) plus 2 extra keys, Function & Reset.
Tape I/O: 300 Baud; 2400/1200Hz FSK; Out: 0.5Vpp;
In: 300mV — 3Vpp.
RTC timer interrupt: 50Hz (frame sync.).
Audio bleeper: 2400/1200Hz (8ohm spkr).
Display/DMA enable-disable line.

Add extra PlAs, ACIAs, etc, without any additional logic.
Power requirements (worst case):
+5V (1A), —5V (100mA), +12V (100mA)

 

My Dream 6800 is currently running Dream Soft package No.2